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Merge 3ebca8b44f into 1972241cd2

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Salvatore Dipietro 2025-06-02 21:54:12 +03:00 • committed by GitHub
commit e0c5dab5a4
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4 changed files with 34 additions and 1 deletions
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1
Makefile.in
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@ -151,6 +151,7 @@ C_SRCS := $(srcroot)src/jemalloc.c \
$(srcroot)src/safety_check.c \
$(srcroot)src/sc.c \
$(srcroot)src/sec.c \
$(srcroot)src/spin_delay_arm.c \
$(srcroot)src/stats.c \
$(srcroot)src/sz.c \
$(srcroot)src/tcache.c \

6
include/jemalloc/internal/spin.h
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@ -2,6 +2,7 @@
#define JEMALLOC_INTERNAL_SPIN_H
#include "jemalloc/internal/jemalloc_preamble.h"
#include "jemalloc/internal/spin_delay_arm.h"
#define SPIN_INITIALIZER {0U}
@ -11,7 +12,10 @@ typedef struct {
static inline void
spin_cpu_spinwait(void) {
# if HAVE_CPU_SPINWAIT
# if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__)) && \
(defined(__GNUC__) || defined(__clang__))
spin_delay_arm();
# elif HAVE_CPU_SPINWAIT
CPU_SPINWAIT;
# else
volatile int x = 0;

13
include/jemalloc/internal/spin_delay_arm.h Normal file
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@ -0,0 +1,13 @@
#include "jemalloc/internal/jemalloc_preamble.h"
/* Global variable to track SB support */
extern int arm_has_sb_instruction;
/* Use SB instruction if available, otherwise ISB */
static inline void spin_delay_arm(void) {
if (__builtin_expect(arm_has_sb_instruction == 1, 1)) {
asm volatile(".inst 0xd50330ff \n"); /* SB instruction encoding */
} else {
asm volatile("isb; \n");
}
}

15
src/spin_delay_arm.c Normal file
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@ -0,0 +1,15 @@
#include "jemalloc/internal/jemalloc_preamble.h"
#include "jemalloc/internal/spin_delay_arm.h"
/* Initialize to 0 (false) by default */
int arm_has_sb_instruction = 0;
#if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__)) && \
(defined(__GNUC__) || defined(__clang__))
#include <sys/auxv.h>
__attribute__((constructor))
void detect_arm_sb_support(void) {
arm_has_sb_instruction = (getauxval(AT_HWCAP) & HWCAP_SB) ? 1 : 0;
}
#endif