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Removed atomics and added guards for compilers

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This commit is contained in:
Salvatore Dipietro 2025-05-12 14:26:14 -07:00
parent d1bb7c6ba7
commit 3ebca8b44f
3 changed files with 14 additions and 30 deletions
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3
include/jemalloc/internal/spin.h
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@ -12,7 +12,8 @@ typedef struct {
static inline void
spin_cpu_spinwait(void) {
# if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__))
# if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__)) && \
(defined(__GNUC__) || defined(__clang__))
spin_delay_arm();
# elif HAVE_CPU_SPINWAIT
CPU_SPINWAIT;

18
include/jemalloc/internal/spin_delay_arm.h
View file

@ -1,23 +1,13 @@
#include "jemalloc/internal/jemalloc_preamble.h"
#include <stdatomic.h>
/* Global variable to track SB support, declared as extern to be defined in one TU */
extern _Atomic int arm_has_sb_instruction;
/* Constructor function declaration - implementation in spin_delay_arm.c */
__attribute__((constructor))
void detect_arm_sb_support(void);
/* Global variable to track SB support */
extern int arm_has_sb_instruction;
/* Use SB instruction if available, otherwise ISB */
static inline void
spin_delay_arm(void) {
#ifdef HWCAP_SB
static inline void spin_delay_arm(void) {
if (__builtin_expect(arm_has_sb_instruction == 1, 1)) {
/* SB instruction encoding */
asm volatile(".inst 0xd50330ff \n");
asm volatile(".inst 0xd50330ff \n"); /* SB instruction encoding */
} else {
/* ISB instruction */
asm volatile("isb; \n");
}
#endif // HWCAP_SB
}

23
src/spin_delay_arm.c
View file

@ -1,22 +1,15 @@
#include "jemalloc/internal/jemalloc_preamble.h"
#include "jemalloc/internal/spin_delay_arm.h"
#include <stdatomic.h>
#if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__))
/* Initialize to 0 (false) by default */
int arm_has_sb_instruction = 0;
#if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__)) && \
(defined(__GNUC__) || defined(__clang__))
#include <sys/auxv.h>
#endif // __linux__ && (defined(__aarch64__) || defined(__arm64__))
/* Global variable to track SB support, defined here to avoid multiple definitions */
_Atomic int arm_has_sb_instruction = ATOMIC_VAR_INIT(0);
/* Constructor function to detect hardware capabilities at program startup */
__attribute__((constructor))
void
detect_arm_sb_support(void) {
#if defined(__linux__) && (defined(__aarch64__) || defined(__arm64__))
/* Check if SB instruction is supported */
if (getauxval(AT_HWCAP) & HWCAP_SB) {
atomic_store_explicit(&arm_has_sb_instruction, 1, memory_order_release);
}
void detect_arm_sb_support(void) {
arm_has_sb_instruction = (getauxval(AT_HWCAP) & HWCAP_SB) ? 1 : 0;
}
#endif
}